1. Field of the Invention
This invention relates to a photodiode (PD) and a photodiode module in optical communication networks, in particular, to a photodiode which is immune from the delay of response due to the diffusion of carriers generated at the periphery of the light receiving region. Rays emitting from an optical fiber or a laser diode (LD) are usually converged for entering the center of the PD chip. However, a part of the rays go into the PD chip at the periphery and make carriers (pairs of electron and hole) at the periphery. Since no reverse bias is applied to the peripheral region of the PD chip, the carriers trek to a p-region or an n-region by diffusion and make a delay photocurrent. The delay of response caused by the peripheral carriers is fatal to high-speed optical communication.
This application claims the priority of Japanese Patent Application No.10-174227 (174227/98) filed on Jun. 22, 1998 which is incorporated herein by reference.
2. Description of Related Art
FIG. 1 is a schematic sectional view of a prior front surface incident type photodiode. A p-region is formed by diffusing a p-type dopant in an n-type substrate. The p-type dopant is, for example, zinc (Zn), cadmium (Cd) or magnesium (Mg). Since Zn is most favorably employed as a p-dopant, the problem will be explained on a Zn-doped PD. Of course, a similar problem accompanies a PD which has a p-substrate and an n-region produced on the p-substrate by diffusing an n-dopant. Here, a prior PD having an n-substrate and a p-region made on the n-substrate by diffusion is explained. The PD has an n-type substrate 1 and an n-type light receiving layer 2 piled on the substrate 1. The n-type light receiving layer 2 has a plurality of epitaxial layers. A p-region 3 is formed by diffusing Zn atoms at the center of the light receiving layer 2. A pn-junction is formed between the n-type light receiving layer 2 and the p-region 3. A p-electrode 4 is fabricated on a part or on the whole periphery of the p-region 3. An n-electrode 5 is produced overall on the bottom of the n-type substrate 1. The peripheral part of the top surface of the light receiving layer 2 is covered with an insulating protecting layer which is not shown in FIG. 1. The PD is reversely biased; i.e., a positive n-electrode 5 and an negative p-electrode 4. The reverse bias makes a depletion layer 6 which lacks carriers, i.e., electrons and holes. The depletion layer 6 is the region between the dotted line wxe2x80x94w and the solid line uxe2x80x94u. The outside of the line wxe2x80x94w is still the n-light receiving layer 2. The inside of the line uxe2x80x94u is the p-type light receiving region 3. A PD device has such a PD chip stored in a package.
The definitions of the depletion layer, the p-type region and the n-type region are first clarified. The n-type region has electrons as major carriers and holes as minority carriers. An n-type semiconductor is produced by doping with an n-type dopant into a semiconductor. The p-region has holes as major carriers and electrons as minority carriers. A p-type semiconductor is produced by doping a semiconductor with a p-type dopant. When a p-region is partially made in an n-type semiconductor, an n-region, a p-region and a pn-junction are formed at the same time. The words are not always used in their correct meaning. Their correct definitions are required for explaining the exact significance of the present invention. The product xe2x80x9cnpxe2x80x9d of the electron concentration xe2x80x9cnxe2x80x9d and the hole concentration xe2x80x9cpxe2x80x9d is constant in a semiconductor which depends only upon temperature. A pn-junction is a continual curved plane at which the number of free electrons is equal to the number of free holes (n=p), where n is an electron concentration and p is a hole concentration. Both electrons and holes are sparse at the pn-junction because of n=p. At the pn-junction, a p-dopant density Na (acceptor density) is equal to an n-dopant density Nd (donor density). The pn-junction has a voltage drop which is nearly equal to the band gap.
When a reverse bias is applied between an anode (minus) and a cathode (plus), most of the bias voltage is applied to the pn-junction. The reverse bias pulls holes toward the p-electrode (anode) and pulls electrons toward the n-electrode (cathode). The reverse bias sweeps up the carriers from the pn-junction. There are some portions which has dopant levels (donors and acceptors) but has little carriers in the vicinity of the pn-junction. The parts lack of carriers in spite of high density donors or acceptors. The depopulated part near the pn-junction is called a xe2x80x9cdepletion layerxe2x80x9d 6. Thus, the depletion layer exists both above and below the pn-junction or both at the n-side and the p-side on the pn-junction. The upper depletion layer and the lower depletion layer sandwich the pn-junction. The thickness of the depletion layer increases in accordance with the reverse bias. But the upper depletion layer and the lower depletion layer don""t have an equal thickness. Asymmetry of the depletion layer results from the difference of the dopant densities Na and Nd. The thicknesses of the n-side depletion layer and the p-side depletion layer are denoted by s and t. The neutrality condition requires sNd=tNa. Gauss theorem gives V=e(s2Nd+t2Na)/xcex5 at the depletion layer, where e is an electron charge, V is the reverse bias and xcex5 is a dielectric constant of the semiconductor. The n-side depletion layer thickness s and the p-side depletion layer thickness t are,
s=[xcex5VNa/{eNd(Nd+Na)}]1/2xe2x80x83xe2x80x83(1) 
t=[xcex5VNd/{eNa(Nd+Na)}]1/2xe2x80x83xe2x80x83(2) 
s+t=[xcex5V(Nd+Na)/{eNdNa}]1/2xe2x80x83xe2x80x83(3) 
An increase of the reverse bias V enhances both the p-side depletion layer t and the n-side depletion layer s in proportion to the square root of V. The depletion layer widens in both directions from the pn-junction. The pn-junction intervenes in the depletion layer. But each thickness is not equal (sxe2x89xa0t). In the case of the PD having an n-type substrate, the light receiving layer on the substrate is also n-type. The electron concentration is low (about 1015 cmxe2x88x923) in the n-light receiving layer. But the p-region is produced by doping a high density p-dopant of about 1018 cmxe2x88x923. The acceptor density Na on the p-side is about thousand times as much as the donor density on the n-side near the pn-junction (Na=Nd). The n-side thickness s is much larger than the p-side thickness t. The p-side depletion layer thickness t is negligible small. The depletion layer mainly expands in the n-type region due to the sparse donors. The boundary on the p-side of the depletion layer is nearly equal to the pn-junction itself. In FIG. 1, the curved solid line uxe2x80x94u is inherently the upper boundary of the depletion layer. But the curved solid line uxe2x80x94u is substantially the pn-junction. The other curved dotted line wxe2x80x94w is the lower boundary (n-side boundary) of the depletion layer.
In FIG. 1, the cross-hatched part enclosed by the solid line uxe2x80x94u is the p-region 3. The region outside of the dotted line wxe2x80x94w is the n-type part of the light receiving layer 2. The region sandwiched by the solid line uxe2x80x94u and the dotted line wxe2x80x94w is the depletion layer 6.
Signal light is carried by an optical fiber or so in optical communication. The propagating signal light goes out from the end in air and disperses into rays. Some incidence rays go into the central part of the PD chip. The depletion layer 6 absorbs the central rays and makes pairs of electron 8 and hole 7 by the band gap transition. The depletion layer 6 has no carriers. The newly-borne carriers (electrons and holes) cannot collide and recombine with an extra counterpart in the depletion layer 6. The electrons 8 progress to the n-region (downward) by the reverse bias. The holes 9 make their way to the p-region 3 by the reverse bias. When an electron invades in the n-region, a elementary charge current e is induced. When a hole arrives at the p-region 3, another elementary charge current e flows. This is a xe2x80x9cphotocurrentxe2x80x9d. The current is also a signal current, since the intensity is in proportion to the signal intensity.
It would be convenient, if the rays entered only the central part of the PD. Some rays induce a problem by going into a periphery of the PD chip. For example, the rays going out of the optical fiber are converged by a lens. But the incidence rays Q have some extension on the PD chip. Some leak rays go into a peripheral part 10 of the n-type light receiving layer 2 outside of the deletion layer 6. The rays induce pairs of electron and hole. Since the peripheral part 10 is an n-type region and the major carrier is electron, the borne electrons are not moved. The borne holes 9 which are minority carriers move in the n-light receiving region 2 by diffusion along the difference of concentration. Since the movement is caused by diffusion, the directions of the movement are random and the speed of the movement is slow. Some holes meet with free electrons and recombine with the electrons in the process of the diffusion. A part of the holes 9 arrives at the depletion layer 6. The holes are accelerated toward the p-region 3 by the reverse bias in the depletion layer 6. When the holes reach the p-region 3, an extra photocurrent of a unit charge e flows in the PD. The extra photocurrent is caused by the stray holes diffusing slowly from the periphery. The extra photocurrent delays far from the normal photocurrent caused by the pairs of electron and hole borne in the depletion layer 6.
The delayed photocurrent induces a tail part following a signal. In the case of a pulse signal, an extra photocurrent flows after the incident light has been extinguished. The falling of the signal is delayed by the extra current which is induced by the holes generated by the peripheral rays. The pulse width is increased to be longer than the original width by the tail current. In the case of analog signals, the delayed tail current causes signal distortion. The signal distortion invites a more serious problem for faster signal rates. Further, in the case of analog signals with a wide dynamic range, the tail current is confused with a small inherent signal.
FIGS. 2(a) and (b) demonstrate the tail current J. FIG. 2(a) is a photodiode driving circuit for applying a reverse bias. A photodiode (PD) and a load resistor RL are interposed between the source voltage Vpd and the ground. An output Vout is extracted at the point xe2x80x9caxe2x80x9d connecting the anode of the PD to the resistor. FIG. 2(b) shows the output Vout for a square input pulse. The dotted line denotes the square input. Even an ideal PD would make an output xe2x80x9cefghixe2x80x9d which includes the delay of the time constant of the electric circuit. The small delay xe2x80x9chixe2x80x9d depends on the time constant. The output of FIG. 1""s PD, however, is followed by a longer tail J (hj). The big tail J originates from the diffusing holes yielded by the extra rays entering the peripheral part 10 of the light receiving layer 2. The delay time xe2x80x9cijxe2x80x9d caused by the tail current is several hundreds of nanoseconds(ns). This means that the extinction of the obstacle tail current requires hundreds of nanoseconds. The tail is a serious obstacle for the PD of fast signal rates. The tail is a more serious hazard to analog signals than digital signals.
The tail-current rather causes a hard problem on monitoring PDs which are employed for monitoring the output power of LDs in LD modules. For example, there is a monitoring PD which accompanies a fast LD oscillating at 1 GHz. The repetition cycle of pulses is 1 ns. An on-time is 500 ps and an off-time is 500 ps. But the tail-current continues for a longer time of microseconds (xcexcs) in the monitoring PD. The photocurrent keeps flowing at the off-time by the tail-current. The tail-currents generated by a plurality of pulses overlap together. Thus the power detected by the PD is larger than the actual LD power. The tail-current hinders the PD from monitoring the correct output power of the LD.
Improvement plans have been proposed for solving the difficulty. One improvement proposed is to cover the periphery 10 with an opaque material, e.g., a metal mask, for forbidding extra rays from going into the periphery 10 of the PD chip. It is a primitive improvement. However, such a proposal has not been practiced due to the cost enhancement by an increase of an extra step and an increase of a metal material. Another proposed improvement is to cover the PD chip with a dielectric film of a 100% refractive index by piling reciprocally two kinds of dielectric films (e.g. amorphous silicon a-Si and silicon nitride SiN) having different refractive indices and different thicknesses. This proposal has not been also practiced yet due to increase of the wafer process.
Another proposal is to annihilate the extra carriers generated at the periphery. FIG. 3 shows a prior PD which has an improvement of killing the peripherally-generated carriers. This structure is called a diffusion shield structure which was first disclosed by Japanese Patent Laying Open No.4-111479 (Japanese Patent Application No.2-230208) by the same applicant as the present invention. The PD has a first p-region 3 and a first pn-junction uxe2x80x94u at the center, and further a second extra p-region 15 and a second pn-junction 17 around the central p-region 3. The second p-region 15 and the second pn-junction 17 expand to the sides of the PD chip. The holes yielded at the periphery by the outer extra incidence rays are annihilated by the second pn-junction 17. The number of the holes which can arrive at a first depletion layer 6 is decreased. The side exposed diffusion shield layer prevents the tail photocurrent.
The diffusion shield type PD in FIG. 3 and FIG. 4 has an n-type substrate 1 and an n-type light receiving layer 2 which is epitaxially piled on the substrate 1. The p-region 3 is formed at the center of the light receiving layer 2 by diffusing zinc (Zn). The second p-region 15 is formed at the periphery of the light receiving layer 2 concentrically to the first p-region 3. Both the first p-region 3 and the second p-region 15 are produced at the same time by diffusing Zn through a mask. A p-electrode 4 is formed on the central p-region 3. An n-electrode 5 is formed on the bottom of the n-substrate 1. The p-electrode (anode) 4 and the n-electrode (cathode) 5 are reversely biased. The central depletion layer 6 is increased by the reverse bias. No bias is applied to the second p-region 15 to the contrary. A natural, narrow depletion layer 16 accompanies the second p-region 15. It is called a xe2x80x9cdiffusion shield depletion layerxe2x80x9d 16 or a xe2x80x9cperipheral depletion layerxe2x80x9d for discriminating it from the central depletion layer 6. The second pn-junction 17 is called a xe2x80x9cdiffusion shield pn-junctionxe2x80x9d or a peripheral pn-junction. Of course, the diffusion shield depletion layer 16 is thinner than the central depletion layer 6.
If outer leak rays make pairs of electron and hole in a peripheral part 10 of the n-light receiving layer 2 which is sandwiched between the neighboring depletion layers 6 and 16, the electrons as majority carriers remain there and holes 9 as minority carriers diffuse to thinner portions. Few of the holes 9 reach the central depletion layer 6. Most of the holes 9, however, diffuse to the peripheral depletion layer 16. The inherent electric field carries the holes 9 to the peripheral p-region 15. The holes are extinguished there naturally. Why are the holes extinguished in the p-region 15? If the diffusion shield p-region 15 were connected by a wire to the n-electrode 5, a current flows from the p-region 15 to the n-electrode 5 via the wire for extinguishing the holes. It is a matter of course. But the fabrication of a p-electrode on the peripheral p-region 15 would raise the cost through an increase of the steps. However, the holes vanish in practice without such an external short-cut circuit.
The reason is explained. The diffusion shield p-region 15 exposes to the sides of the PD chip. The sides of the PD chip are not covered with dielectric films. The pn-junctions 17 on the sides are not protected by the film. Carriers can flow across the pn-junction without the protection film. Thus, the pn-junction without a covering film is substantially short-circuited. The sides of the pn-junction 17 are imperfect. The imperfection of the pn-junction 17 allows the holes to flow from the p-region 15 to the n-type light receiving layer 2. The short-circuit cancels the holes diffused to the p-region 15 from the n-type light receiving layer 2. The pn-junction 17 which is exposed to the sides without protection may be called a self-shortcircuit or an inner short-circuit. The uncovered pn-junction 17 has a merit of dispensing with an external circuit for vanishing the extra holes.
The diffusion shield layer was advantageous for suppressing the tail current. The diffusion shield p-region is made together with the central p-region by a modified mask having the peripheral holes in addition to the central holes.
Since the peripheral p-region is simultaneously made by the step of making the central p-region, the step of fabrication is not increased for the improvement. The meaning of the word xe2x80x9cdiffusion shieldxe2x80x9d is now clarified. The diffusion shield signifies to make an extra p-region by the Zn-diffusion for hindering the holes from moving by the peripheral diffusion shield layer. Alternatively, the word xe2x80x9cdiffusion shieldxe2x80x9d means hindering the holes from diffusing to the central p-region.
Recent optical subscriber networks require optical receiving (PD module) sets which operate at a speed higher than 50 Mbps and have a wide dynamic range. For example, about 50 dB of 10 dBm to xe2x88x9240 dBm is sometimes required for the dynamic range of the PD module. The severe condition requires a further reduction of the tail-current of a PD. Although the mentioned diffusion shield layer 15 of FIG. 3 is effective, it is not satisfactory yet for the recent requirements of the wide dynamic range and the fast signal rate. Even a PD of FIG. 3 cannot expel thoroughly the tail-current. The PD of FIG. 3 cannot realize a 50 dB wide dynamic range.
One purpose of the present invention is to provide a PD which can suppress the tail-current completely by annihilating the extra carriers produced at the periphery. Another purpose of the present invention is to provide a PD module having a wide dynamic range for fast signal rates.
For annihilating the extra carriers, this invention makes a second peripheral pn-junction enclosing a first central pn-junction on a PD chip. The second p-region does not reach the sides of the PD chip. The ends of the second pn-junction do not appear on the sides. The second pn-junction has its ends within the surface. The ends of the second pn-junction are covered with a protecting film on the surface. Since the ends of the second pn-junction are protected by the film, the pn-junction is not shortcut at the ends unlike the PD of FIG. 3. The first central p-region is provided with a p-electrode. The n-substrate is provided with an n-electrode. The output signal is extracted from the central p-electrode and the n-electrode which are reversely biased. The second peripheral p-region is also provided with a peripheral p-electrode. The n-electrode and the peripheral p-electrode are also reversely biased for absorbing extra carriers generated at the periphery by the leak incidence rays. An extra depletion layer is formed beneath the peripheral p-region. The thickness of the depletion layer is increased by raising the reverse bias. The holes borne in the depletion layer are pulled to the p-region and are killed at the p-electrode by a current. The current also annihilates the extra electrons pulled in the n-region. The two sets of p-regions, pn-junctions and depletion layers are discriminated by words xe2x80x9ccentralxe2x80x9d and xe2x80x9cperipheralxe2x80x9d for geometrical differences. Sometimes the xe2x80x9cperipheralxe2x80x9d is replaced by xe2x80x9cdiffusion-shieldxe2x80x9d which denotes the function of the peripheral parts. Thus, the word xe2x80x9cdiffusion shieldxe2x80x9d is a synonym of the word xe2x80x9cperipheralxe2x80x9d from now onward.
Namely, the PD of the present invention has two concentric pn-junctions which are reversely biased. The central pn-junction makes a normal photocurrent of transmitted signals. The peripheral pn-junction pulls and annihilates the carriers generated by the leak rays entering the periphery of the chip. Then, the reverse bias on the peripheral pn-junction prevents the stray carriers from arriving at the central pn-junction and from making an extra photocurrent. The tail-current is eliminated from the output of the PD. Only the carriers borne at the central depletion layer by the centrally incidence rays make a photocurrent. Since the tail-current is removed, the PD is immune from the signal distortion. The PD of the present invention enjoys far faster response than the prior PD of FIG. 3. This invention gives PDs a wide dynamic range of 50 dB.
The peripheral p-regions are made simultaneously with the central p-regions by the p-dopant diffusion. The peripheral p-electrodes are also produced simultaneously with the central p-electrodes. The addition of the peripheral p-regions and the peripheral p-electrodes adds no step to the wafer process. The PDs of the present invention can be made on the same wafer process as the conventional one. The production cost is not raised by the addition of the peripheral pn-junctions and electrodes. The present invention is described on the PDs having an n-type substrate so far. But this invention can be also applied to PDs having a p-type substrate and an n-type region which are made by epitaxy or diffusion. In the case of the p-substrate PDs, all the conductive types of the substrate, epitaxial layers and electrodes should be reversed.